Ars Technica

ASIC design/verification or embedded systems programming

1. In a big company, doing ASIC design verification for a WCDMA modem for 3G cellular chips. 2. Small company, doing Embedded Software Programming. Working on the design and implementation of layer 1 ...
Ars Technica

Breaking into ASIC Design/Verification

I'm fast approaching the one year mark with my current employer since I graduated last year. Previously, I did three four month work terms with them and they were for the most part interesting. I took ...
EDN

Pre-configured DFT structures can simplify ASIC design, verification

Steven Kawamoto, Sr. Marketing Manager, Custom LSI Solutions Unit, Gaku Ogura, Sr. Marketing Manager, Design Solutions Center, Richard Lee, Design Engineer, Design ...
Design-Reuse

Aldec Extends Spectrum of Verification Tools for Use in Digital ASIC Designs

Henderson, NV, May. 17, 2016 – Aldec, Inc., a pioneer in mixed HDL language simulation and hardware-assisted verification solutions for digital system designs, today announces that its verification ...
EDN

Verification of a single-chip Analog TV and Digital TV ASIC

Consumer entertainment products offer up many challenges for design and verification teams. How do we integrate functions from multiple previous-generation products with new features? How much time ...
Design-Reuse

Cadence Boosts Verification Productivity for Complex FPGA/ASIC Design

SAN JOSE, Calif. -- Jan 10, 2011 -- Cadence Design Systems, Inc. (NASDAQ: CDNS), a global leader in electronic design innovation, today announced significant new advancements to help boost ...
Business Wire

MathWorks Speeds FPGA and ASIC Verification with Universal Verification Methodology (UVM) Support

NATICK, Mass.--(BUSINESS WIRE)--MathWorks today announced that HDL Verifier provides support for the Universal Verification Methodology (UVM) starting with Release 2019b, which is currently available.
Semiconductor Engineering

Synopsys FPGA Platform: Enabling Faster Design, Verification and Debug of FPGAs

FPGA development teams are adopting ASIC-style design, verification and debug methodologies. Here are the necessary elements of such a flow. September 11th, 2019 - By: Synopsys Field programmable gate ...
Electronic Design

Verification Platform Speeds Simulation And Emulation

R>epresenting a multifunction verification platform that provides both simulation acceleration and in-circuit emulation capabilities, the Palladium ASIC design ...

Chip design and AI-driven engineering emerge as niche growth bets for IT sector

India’s IT services leaders are ramping up their semiconductor design and AI-driven engineering capabilities as global ...
New Electronics

Aion Silicon expands Barcelona Design Centre to address demand for ASIC and SoC solutions

Aion Silicon (formerly Sondrel), a specialist provider of ASIC/SoC architecture and design services, is expanding its ...
Semiconductor Engineering

ASIC/IC Trends With A Focus On Factors Of Silicon Success

When Aristotle uttered this humble aphorism, he wasn’t telling us to throw up our hands and not bother with learning. He was encouraging us to continue digging deeper, to get answers and ask questions ...